Modern architecture research relies on simulators to evaluate system security, yet analyzing emerging hardware vulnerabilities like RowHammer requires full-system visibility. As RowHammer vulnerabilities worsen with continuous technology scaling, existing simulators lack the system-level models needed to study complex OS effects and cross-layer mitigations. This tool deficiency leaves modern computing platforms exposed to severe reliability and security risks. In this work, we present HammerSim, a gem5-based framework for modeling RowHammer at the full-system level. HammerSim integrates probability-driven bitflip modeling to realistically capture the behavior of RowHammer. It further enables evaluation of hardware and software mitigations such as TRR and selective ECC. We validate HammerSim's bitflip modeling against real DDR4 DIMMs using JS divergence, demonstrating its utility in studying attacks, defenses, and benign workload susceptibility. Our framework provides an extensible platform to bridge the gap between hardware experiments and architectural simulation.

翻译：现代架构研究依赖模拟器来评估系统安全性，但分析RowHammer等新兴硬件漏洞需要全系统可见性。随着持续的技术缩放，RowHammer漏洞不断恶化，现有模拟器缺乏研究复杂操作系统效应和跨层缓解措施所需的系统级模型。这一工具体系缺陷使得现代计算平台面临严重可靠性与安全风险。本文提出HammerSim——一种基于gem5的全系统级RowHammer建模框架。HammerSim集成概率驱动的比特翻转建模，以真实捕获RowHammer行为，并支持对TRR、选择性ECC等硬件与软件缓解措施的评估。我们使用JS散度验证了HammerSim针对真实DDR4 DIMM的比特翻转建模准确性，证明了其在研究攻击、防御及良性工作负载易感性方面的实用性。该框架提供了一个可扩展平台，弥合了硬件实验与架构模拟之间的鸿沟。