This paper investigates an emerging cache side channel attack defense approach involving the use of hardware performance counters (HPCs). These counters monitor microarchitectural events and analyze statistical deviations to differentiate between malicious and benign software. With numerous proposals and promising reported results, we seek to investigate whether published HPC-based detection methods are evaluated in a proper setting and under the right assumptions, such that their quality can be ensured for real-word deployment against cache side-channel attacks. To achieve this goal, this paper presents a comprehensive evaluation and scrutiny of existing literature on the subject matter in a form of a survey, accompanied by experimental evidences to support our evaluation.

翻译：本文研究了一种新兴的缓存侧信道攻击防御方法，该方法涉及使用硬件性能计数器（HPC）。这些计数器监控微架构事件，并通过分析统计偏差来区分恶意软件与良性软件。针对大量已提出的方案及其令人振奋的报告结果，我们旨在探究已发表的基于HPC的检测方法是否在适当的环境和正确的假设下进行了评估，从而确保其质量能够支撑对抗缓存侧信道攻击的实际部署。为实现这一目标，本文以综述形式对现有相关文献进行了全面评估与审视，并辅以实验证据支持我们的评价。