A variety of computing platform like Field Programmable Gate Array (FPGA), Graphics Processing Unit (GPU) and multicore Central Processing Unit (CPU) in data centers are suitable for acceleration of data-intensive workloads. Especially, FPGA platforms in data centers are gaining popularity for high-performance computations due to their high speed, reconfigurable nature and cost effectiveness. Such heterogeneous, highly parallel computational architectures in data centers, combined with high-speed communication technologies like 5G, are becoming increasingly suitable for real-time applications. However, flexibility, cost-effectiveness, high computational capabilities, and energy efficiency remain challenging issues in FPGA based data centers. In this context an energy efficient scheduling solution is required to maximize the resource profitability of FPGA. This paper introduces a power-aware scheduling methodology aimed at accommodating periodic hardware tasks within the available FPGAs of a data center at their potentially maximum speed. This proposed methodology guarantees the execution of these tasks us ing the maximum number of parallel computation units possible to implement in the FPGAs, with minimum power consumption. The proposed scheduling methodology is implemented in a data center with multiple Alveo-50 Xilinx-AMD FPGAs and Vitis 2023 tool. The evidence from the implementation shows the proposed scheduling methodology is efficient compared to existing solutions.

翻译：数据中心中诸如现场可编程门阵列（FPGA）、图形处理器（GPU）和多核中央处理器（CPU）等多种计算平台，适合用于加速数据密集型工作负载。尤其是数据中心中的FPGA平台，因其高速度、可重构特性及成本效益，在高性能计算领域日益受到青睐。这种结合了5G等高速通信技术的高度并行异构计算架构，正愈发适用于实时应用场景。然而，灵活性、成本效益、高计算能力及能效问题仍是基于FPGA的数据中心面临的挑战。在此背景下，需要一种能效调度方案来最大化FPGA的资源收益。本文提出一种功耗感知调度方法，旨在以潜在最高速度将周期性硬件任务分配给数据中心内可用的FPGA。该方法通过采用FPGA中可实现的最大并行计算单元数量来确保任务执行，同时将功耗降至最低。该调度方法在配备多个Alveo-50 Xilinx-AMD FPGA及Vitis 2023工具的数据中心中实现。实现结果表明，与现有方案相比，所提调度方法具有更高的效率。