This article describes an efficient way to implement the multiplication instructions for a RISCV processor. Instead of using three predefined IP blocks for signed, unsigned and mixed multiplication, this article presents a novel extension to the Baugh-Wooley multiplication algorithm which reduces area and power consumption with roughly a factor three.

翻译：本文描述了一种为RISC-V处理器高效实现乘法指令的方法。不同于使用三个预定义IP模块分别处理有符号、无符号及混合乘法，本文提出了一种对Baugh-Wooley乘法算法的新型扩展，可将面积和功耗降低约三分之二。