High-performance analog and mixed-signal (AMS) circuits are mainly full-custom designed, which is time-consuming and labor-intensive. A significant portion of the effort is experience-driven, which makes the automation of AMS circuit design a formidable challenge. Large language models (LLMs) have emerged as powerful tools for Electronic Design Automation (EDA) applications, fostering advancements in the automatic design process for large-scale AMS circuits. However, the absence of high-quality datasets has led to issues such as model hallucination, which undermines the robustness of automatically generated circuit designs. To address this issue, this paper introduces AMSnet-KG, a dataset encompassing various AMS circuit schematics and netlists. We construct a knowledge graph with annotations on detailed functional and performance characteristics. Facilitated by AMSnet-KG, we propose an automated AMS circuit generation framework that utilizes the comprehensive knowledge embedded in LLMs. We first formulate a design strategy (e.g., circuit architecture using a number of circuit components) based on required specifications. Next, matched circuit components are retrieved and assembled into a complete topology, and transistor sizing is obtained through Bayesian optimization. Simulation results of the netlist are fed back to the LLM for further topology refinement, ensuring the circuit design specifications are met. We perform case studies of operational amplifier and comparator design to verify the automatic design flow from specifications to netlists with minimal human effort. The dataset used in this paper will be open-sourced upon publishing of this paper.

翻译：高性能模拟与混合信号（AMS）电路主要采用全定制设计，耗时耗力。其中大部分工作依赖于经验，这使得AMS电路设计的自动化成为一项艰巨挑战。大型语言模型（LLM）已成为电子设计自动化（EDA）应用中的强大工具，推动了大规模AMS电路自动设计流程的进步。然而，高质量数据集的缺失导致了模型幻觉等问题，削弱了自动生成电路设计的鲁棒性。为解决此问题，本文提出了AMSnet-KG数据集，其中包含多种AMS电路原理图与网表。我们构建了一个知识图谱，对详细的功能与性能特征进行了标注。借助AMSnet-KG，我们提出了一种利用LLM中嵌入的全面知识实现自动AMS电路生成的框架。我们首先根据所需规格制定设计策略（例如，使用若干电路元件的电路架构）。接着，检索匹配的电路元件并将其组装为完整拓扑，并通过贝叶斯优化确定晶体管尺寸。网表的仿真结果反馈给LLM以进一步优化拓扑，确保满足电路设计规格。我们以运算放大器与比较器设计为例进行研究，验证了从规格到网表的自动设计流程，所需人工干预极少。本文所用数据集将在论文发表时开源。