We introduce ABACuS, a new low-cost hardware-counter-based RowHammer mitigation technique that performance-, energy-, and area-efficiently scales with worsening RowHammer vulnerability. We observe that both benign workloads and RowHammer attacks tend to access DRAM rows with the same row address in multiple DRAM banks at around the same time. Based on this observation, ABACuS's key idea is to use a single shared row activation counter to track activations to the rows with the same row address in all DRAM banks. Unlike state-of-the-art RowHammer mitigation mechanisms that implement a separate row activation counter for each DRAM bank, ABACuS implements fewer counters (e.g., only one) to track an equal number of aggressor rows. Our evaluations show that ABACuS securely prevents RowHammer bitflips at low performance/energy overhead and low area cost. We compare ABACuS to four state-of-the-art mitigation mechanisms. At a near-future RowHammer threshold of 1000, ABACuS incurs only 0.58% (0.77%) performance and 1.66% (2.12%) DRAM energy overheads, averaged across 62 single-core (8-core) workloads, requiring only 9.47 KiB of storage per DRAM rank. At the RowHammer threshold of 1000, the best prior low-area-cost mitigation mechanism incurs 1.80% higher average performance overhead than ABACuS, while ABACuS requires 2.50X smaller chip area to implement. At a future RowHammer threshold of 125, ABACuS performs very similarly to (within 0.38% of the performance of) the best prior performance- and energy-efficient RowHammer mitigation mechanism while requiring 22.72X smaller chip area. ABACuS is freely and openly available at https://github.com/CMU-SAFARI/ABACuS.

翻译：本文提出ABACuS，一种新型低成本硬件计数器驱动的行锤缓解技术，能在行锤脆弱性恶化时保持性能、能耗与面积的高效可扩展性。我们发现，正常负载和行锤攻击都倾向于在多个DRAM存储体中几乎同时访问具有相同行地址的DRAM行。基于此观察，ABACuS的核心思想是使用单一共享行激活计数器，追踪所有DRAM存储体中具有相同行地址的行的激活情况。与现有先进行锤缓解机制为每个DRAM存储体单独维护行激活计数器不同，ABACuS通过更少的计数器（例如仅需一个）追踪等量的攻击行。评估表明，ABACuS能以低性能/能耗开销与低面积成本安全地防止行锤比特翻转。我们将ABACuS与四种先进缓解机制对比。在近未来行锤阈值1000下，ABACuS在62个单核（8核）负载上仅引入平均0.58%（0.77%）性能开销与1.66%（2.12%）DRAM能耗开销，每个DRAM rank仅需9.47 KiB存储空间。在行锤阈值1000下，现有面积开销最小的缓解机制平均性能开销比ABACuS高1.80%，而ABACuS所需芯片面积小2.50倍。在未来行锤阈值125下，ABACuS的性能表现与现有性能/能耗最优的行锤缓解机制高度接近（差异在0.38%以内），而所需芯片面积小22.72倍。ABACuS代码已开源，可通过https://github.com/CMU-SAFARI/ABACuS 免费获取。