RISC-V cores have gained a lot of popularity over the last few years. However, being quite a recent and novel technology, there is still a gap in the availability of comprehensive simulation frameworks for RISC-V that cover both the functional and extra-functional aspects. This gap hinders progress in the field, as fast yet accurate system-level simulation is crucial for Design Space Exploration (DSE). This work presents an open-source framework designed to tackle this challenge, integrating functional RISC-V simulation (achieved with GVSoC) with SystemC-AMS (used to model extra-functional aspects, in detail power storage and distribution). The combination of GVSoC and SystemC-AMS in a single simulation framework allows to perform a DSE that is dependent on the mutual impact between functional and extra-functional aspects. In our experiments, we validate the framework's effectiveness by creating a virtual prototype of a compact, battery-powered embedded system.

翻译：RISC-V内核在过去几年中广受欢迎。然而，作为一项相当新颖的技术，目前仍缺乏涵盖功能与非功能两方面特性的综合性RISC-V仿真框架。这一空白阻碍了该领域的发展，因为快速而精确的系统级仿真对于设计空间探索（DSE）至关重要。本文提出一种开源框架以应对这一挑战，该框架将功能级RISC-V仿真（通过GVSoC实现）与SystemC-AMS（用于建模非功能特性，特别是电源存储与分配）进行集成。GVSoC与SystemC-AMS在单一仿真框架中的结合，使得能够开展依赖于功能与非功能特性相互影响的DSE。实验中，我们通过构建紧凑型电池驱动嵌入式系统的虚拟原型，验证了该框架的有效性。