Complex Verilog Design Problems (CVDP) challenge hardware LLM agents because solving them requires localizing verifier-relevant RTL, testbenches, include paths, and build dependencies inside large repository snapshots, making precise edits, and recovering from sparse hidden-verifier failures. We present Trace2Skill, a test-time scaling framework that improves a hardware agent without RTL-specialized model fine-tuning. Rather than training a new model or only sampling more candidate solutions, Trace2Skill treats the agent's natural-language skill as an evolvable policy. It mines repeated rollout traces for success and failure modes, converts them into dense diagnostics and oracle lessons, and uses an oracle, mutator, and selector loop to produce task-specific skills that guide later search, editing, validation, and recovery. Because final pass/fail labels are often too coarse for hard failures, Trace2Skill also supports bounded runtime dense verifier feedback that returns sanitized functional observations while keeping hidden harnesses and reference solutions inaccessible to the agent. This feedback helps guide skill evolution and agent execution by connecting skill text, verifier evidence, and downstream behavior. Across hard CVDP tasks that defeat the seed CVDP agent, including tasks that also defeat frontier coding agents, Trace2Skill with dense verifier feedback substantially improves task pass rates and produces breakthrough passes on previously unsolved tasks, without requiring high-quality fine-tuning data, specialized RTL model training, or model weight updates. The same framework provides a general test-time scaling strategy that can extend beyond digital design to other verifiable EDA tasks.

翻译：复杂Verilog设计问题（CVDP）对硬件大语言模型智能体构成挑战，因为解决这些问题需要在大型仓库快照中定位验证器相关的RTL、测试台、包含路径和构建依赖关系，进行精确编辑，并从稀疏的隐藏验证器故障中恢复。我们提出Trace2Skill，一种测试时扩展框架，该框架在不进行RTL专用模型微调的情况下提升硬件智能体性能。不同于训练新模型或仅采样更多候选解决方案，Trace2Skill将智能体的自然语言技能视为可进化的策略。它挖掘重复回滚轨迹中的成功与失败模式，将其转化为密集诊断和预言机教训，并利用预言机、变异器和选择器循环生成任务特定技能，以指导后续的搜索、编辑、验证和恢复。由于最终的通过/失败标签对于硬故障往往过于粗糙，Trace2Skill还支持有界运行时密集验证器反馈，该反馈返回经过净化的功能观察结果，同时保持隐藏的测试平台和参考解决方案对智能体不可访问。这种反馈通过连接技能文本、验证器证据和下游行为，有助于指导技能进化和智能体执行。在击败种子CVDP智能体的硬CVDP任务（包括也击败前沿编码智能体的任务）中，配备密集验证器反馈的Trace2Skill显著提高了任务通过率，并在先前未解决的任务上实现了突破性通过，且无需高质量微调数据、专用RTL模型训练或模型权重更新。同一框架提供了一种通用的测试时扩展策略，可超越数字设计扩展到其他可验证的EDA任务。