In contemporary times, the increasing complexity of the system poses significant challenges to the reliability, trustworthiness, and security of the SACRES. Key issues include the susceptibility to phenomena such as instantaneous voltage spikes, electromagnetic interference, neutron strikes, and out-of-range temperatures. These factors can induce switch state changes in transistors, resulting in bit-flipping, soft errors, and transient corruption of stored data in memory. The occurrence of soft errors, in turn, may lead to system faults that can propel the system into a hazardous state. Particularly in critical sectors like automotive, avionics, or aerospace, such malfunctions can have real-world implications, potentially causing harm to individuals. This paper introduces a novel fault injector designed to facilitate the monitoring, aggregation, and examination of micro-architectural events. This is achieved by harnessing the microprocessor's PMU and the debugging interface, specifically focusing on ensuring the repeatability of fault injections. The fault injection methodology targets bit-flipping within the memory system, affecting CPU registers and RAM. The outcomes of these fault injections enable a thorough analysis of the impact of soft errors and establish a robust correlation between the identified faults and the essential timing predictability demanded by SACRES.

翻译：在现代，系统复杂性的日益增加对SACRES的可靠性、可信赖性和安全性构成了重大挑战。关键问题包括对瞬时电压尖峰、电磁干扰、中子辐射以及超出范围温度等现象的敏感性。这些因素可能导致晶体管开关状态变化，进而引发位翻转、软错误以及内存中存储数据的瞬时损坏。软错误的发生可能导致系统故障，从而使系统陷入危险状态。尤其在汽车、航空电子或航天等关键领域，此类故障可能产生实际影响，甚至对人员造成伤害。本文介绍了一种新型故障注入器，旨在促进微架构事件的监控、聚合和检查。通过利用微处理器的性能监控单元和调试接口，该方法特别关注确保故障注入的可重复性。该故障注入方法针对内存系统中的位翻转，影响CPU寄存器和随机存取存储器。这些故障注入的结果能够对软错误的影响进行深入分析，并在识别出的故障与SACRES所需的关键时序可预测性之间建立稳健的关联。