Despite limited success in large language model (LLM)-based register-transfer-level (RTL) code generation, the root causes of errors remain poorly understood. To address this, we conduct a comprehensive error analysis, finding that most failures arise not from deficient reasoning, but from a lack of RTL programming knowledge, insufficient circuit understanding, ambiguous specifications, or misinterpreted multimodal inputs. Leveraging in-context learning, we propose targeted correction techniques: a retrieval-augmented generation (RAG) knowledge base to supply domain expertise; design description rules with rule-checking to clarify inputs; external tools to convert multimodal data into LLM-compatible formats; and an iterative simulation-debugging loop for remaining errors. Integrating these into an LLM-based framework yields significant improvement, achieving 98.1% accuracy on the VerilogEval benchmark with DeepSeek-v3.2-Speciale, demonstrating the effectiveness of our approach.

翻译：尽管基于大语言模型（LLM）的寄存器传输级（RTL）代码生成取得了一定成功，但其错误的根本原因仍不甚明了。为解决此问题，我们进行了全面的错误分析，发现大多数失败并非源于推理能力不足，而是由于缺乏RTL编程知识、电路理解不充分、规格说明模糊或多模态输入被误解所致。利用上下文学习，我们提出了针对性的校正技术：一个检索增强生成（RAG）知识库以提供领域专业知识；通过设计描述规则及规则检查来澄清输入；使用外部工具将多模态数据转换为LLM兼容的格式；以及一个用于处理剩余错误的迭代仿真-调试循环。将这些技术集成到一个基于LLM的框架中，取得了显著改进，在VerilogEval基准测试中使用DeepSeek-v3.2-Speciale达到了98.1%的准确率，证明了我们方法的有效性。