Using logic gates is the traditional way of designing logic circuits. However, most of the minimization algorithms concern a limited set of gates (complete sets), like sum of products, exclusive-or sum of products, NAND gates, NOR gates e.t.c.. In this paper, a method is proposed for minimizing multi-output Boolean functions using any kind of two-input gates although it can easily be extended to multi-input gates. The method is based on non-linear mixed integer programming. The experimental results show that the method gives the same or better results compared to other methods available in the literature. However, other methods do not ensure that they produce the minimal solution, while the main advantages of the proposed method are that it does guarantee minimality and it can also handle Boolean functions for incompletely specified functions. The method is general enough and can easily be extended to more complicated design modules than just basic gates.

翻译：使用逻辑门是设计逻辑电路的传统方式。 但是,大多数最小化算法都涉及有限的一套门(完整的套件),如产品总和、独家或产品总和、NAND门、NOR门等。 在本文中,建议采用一种方法,使用任何类型的双输入门来尽量减少多输出波林功能,尽管它很容易扩展到多输入门。该方法基于非线性混合整数编程。实验结果显示,与文献中的其他方法相比,该方法产生的结果相同或更好。然而,其他方法并不能确保它们产生最起码的解决方案,而拟议方法的主要优点是它保证了最小性,它也可以处理未完全指定的功能的布林功能。该方法很笼统,而且很容易扩大到比基本门更复杂的设计模块。