Modern reconfigurable AI accelerators rely on rich mapping and data-layout flexibility to sustain high utilization across matrix multiplication, convolution, and emerging applications beyond AI. However, exposing this flexibility through fine-grained micro-control results in prohibitive control overhead of fetching configuration bits from off-chip memory. This paper presents MINISA, a minimal instruction set that programs a reconfigurable accelerator at the granularity of Virtual Neurons (VNs), the coarsest control granularity that retains flexibility of hardware and the finest granularity that avoids unnecessary control costs. First, we introduce FEATHER+, a modest refinement of FEATHER, that eliminates redundant on-chip replication needed for runtime dataflow/layout co-switching and supports dynamic cases where input and weight data are unavailable before execution for offline layout manipulation. MINISA then abstracts control of FEATHER+ into three layout-setting instructions for input, weight, and output VNs and a single mapping instruction for setting dataflow. This reduces the control and instruction footprint while preserving the legal mapping and layout space supported by the FEATHER+. Our results show that MINISA reduces geometric mean off-chip instruction traffic by factors ranging from 35x to (4x10^5)x under various sizes under 50 GEMM workloads spanning AI (GPT-oss), FHE, and ZKP. This eliminates instruction-fetch stalls that consume 96.9% of micro-instruction cycles, yielding up to 31.6x end-to-end speedup for 16x256 FEATHER+. Our code: https://github.com/maeri-project/FEATHER/tree/main/minisa.

翻译：现代可重构AI加速器依赖丰富的映射与数据布局灵活性，以在矩阵乘法、卷积及AI之外的新兴应用中维持高利用率。然而，通过细粒度微控制器暴露这种灵活性会导致从片外存储器读取配置比特的显著控制开销。本文提出MINISA，一种最小指令集，以虚拟神经元（VNs）为粒度编程可重构加速器——这是保留硬件灵活性的最粗控制粒度，同时是避免不必要控制成本的最细粒度。首先，我们引入FEATHER+，对FEATHER进行适度改进：它消除了运行时数据流/布局协同切换所需的冗余片上复制，并支持输入与权重数据在执行前不可用（从而无法进行离线布局操作）的动态场景。MINISA随后将FEATHER+的控制抽象为三条布局设置指令（分别针对输入、权重和输出VNs）及一条用于设定数据流的映射指令。这在保留FEATHER+合法映射与布局空间的同时，减少了控制与指令占用。结果显示，在涵盖AI（GPT-oss）、FHE和ZKP的50个GEMM工作负载中，针对不同规模，MINISA将几何平均片外指令流量降低了35倍至4×10^5倍。这消除了消耗微指令周期96.9%的指令获取停顿，使得16×256 FEATHER+的端到端加速比最高达31.6倍。代码开源：https://github.com/maeri-project/FEATHER/tree/main/minisa。