We demonstrate a multi-agent framework that takes an analog circuit from topology synthesis to layout. A researcher agent directs schematic and layout agents, a four-tier memory stores the specification and lessons, and separate agents review the designs. Deterministic tools provide pass/fail simulation reports, symbolic analysis, graph-based netlist equivalence, parasitic injection, and extraction with DRC and LVS in every optimization trial. A human approves the specification and the layout plan. For a fourth-order, 250-Hz subthreshold biopotential low-pass filter, the researcher agent synthesized, through simulation-guided trial and error, a novel current-reuse architecture that shares a single dc bias branch between a super-source-follower biquad and a flipped-voltage-follower biquad. The agents completed a DRC- and LVS-clean layout in 130-nm IHP SG13G2 CMOS that meets the specification in nominal post-layout simulation, despite the noise-power trade-off and threshold-voltage sensitivity of subthreshold operation. The filter's input-referred noise over 0.5-200 Hz is 41.6% below that of the super-source-follower reference design at about equal core power.

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