In this study, we investigate the use of Large Language Models (LLMs) for the interactive and automated production of customs circuit layouts described in natural language. Our proposed layout automation process leverages a template-and-grid-based layout generation framework to create process-portable layout generators tailored for various custom circuits, including standard cells and high-speed mixed-signal circuits. However, rather than directly describing the layout generators in traditional programming language, we utilize natural language using LLMs to make the layout generation process more intuitive and efficient. This approach also supports interactive modifications of the layout generator code, enhancing customization capabilities. We demonstrate the effectiveness of our LLM-based layout generation method across several custom circuit examples, such as logic standard cells, a serializer and a strong arm latch, including their completeness in terms of Design Rule Check (DRC), Layout Versus Schematic (LVS) test, and post-layout performance for high-speed circuits. Our experimental results indicate that LLMs can generate a diverse range of circuit layouts with substantial customization options.

翻译：本研究探讨了利用大型语言模型（LLMs）实现以自然语言描述的定制电路版图的交互式与自动化生成。我们提出的版图自动化流程采用基于模板与网格的版图生成框架，以创建适用于各类定制电路（包括标准单元与高速混合信号电路）的工艺可移植版图生成器。然而，我们并非使用传统编程语言直接描述版图生成器，而是借助LLMs利用自然语言，使版图生成过程更加直观高效。该方法同时支持对版图生成器代码进行交互式修改，从而增强了定制能力。我们在多个定制电路示例（如逻辑标准单元、串行器与强臂锁存器）上验证了所提出的基于LLM的版图生成方法的有效性，包括其在设计规则检查（DRC）、版图与原理图一致性检查（LVS）测试的完备性，以及高速电路的版图后性能。实验结果表明，LLMs能够生成具有丰富定制选项的多样化电路版图。