Memory disaggregation has emerged as an alternative to traditional server architecture in data centers. This paper introduces DRackSim, a simulation infrastructure to model rack-scale hardware disaggregated memory. DRackSim models multiple compute nodes, memory pools, and a rack-scale interconnect similar to GenZ. An application-level simulation approach simulates an x86 out-of-order multi-core processor with a multi-level cache hierarchy at compute nodes. A queue-based simulation is used to model a remote memory controller and rack-level interconnect, which allows both cache-based and page-based access to remote memory. DRackSim models a central memory manager to manage address space at the memory pools. We integrate community-accepted DRAMSim2 to perform memory simulation at local and remote memory using multiple DRAMSim2 instances. An incremental approach is followed to validate the core and cache subsystem of DRackSim with that of Gem5. We measure the performance of various HPC workloads and show the performance impact for different nodes/pools configuration.

翻译：内存解耦已成为数据中心中传统服务器架构的一种替代方案。本文介绍了DRackSim，一种用于建模机架级硬件解耦内存的模拟基础设施。DRackSim模拟了多个计算节点、内存池以及类似GenZ的机架级互连。采用应用级模拟方法，对计算节点处具有多级缓存层次的x86乱序多核处理器进行建模。使用基于队列的模拟来建模远程内存控制器和机架级互连，从而支持基于缓存和基于页面的远程内存访问。DRackSim构建了一个中央内存管理器来管理内存池中的地址空间。我们集成了社区认可的DRAMSim2，通过多个DRAMSim2实例对本地和远程内存进行内存模拟。采用增量方法验证DRackSim的核心与缓存子系统与Gem5的一致性。我们测量了多种HPC工作负载的性能，并展示了不同节点/内存池配置对性能的影响。