A stable low dropout (LDO) voltage regulator topology is presented in this paper. LDOs are linear voltage regulators that do not produce ripples in the DC voltage. Despite the close proximity of the supply input voltage to the output, this regulator will maintain the desired output voltage. Based on a detailed comparison between NMOS and PMOS-based LDOs, we decided to opt for a PMOS design because it does not require an additional charge pump as compared to NMOS. A demonstration of how Miller capacitance enhances overall design stability is also presented here. Multiple pass elements are arranged in parallel in order to increase the current carrying capacity of the pass network.

翻译：本文提出了一种稳定的低压差稳压器拓扑结构。低压差稳压器是一种线性稳压器，不会在直流电压中产生纹波。尽管电源输入电压与输出电压非常接近，该稳压器仍能维持所需的输出电压。基于对NMOS和PMOS低压差稳压器的详细比较，我们决定采用PMOS设计方案，因为与NMOS相比，它不需要额外的电荷泵。本文还演示了米勒电容如何增强整体设计稳定性。多个传输元件并行排列，以提高传输网络的电流承载能力。