Numerous security threats are emerging from untrusted players in the integrated circuit (IC) ecosystem. Among them, reverse engineering practices with the intent to counterfeit, overproduce, or modify an IC are worrying. In recent years, various techniques have been proposed to mitigate the aforementioned threats but no technique seems to be adequate to hide the hierarchy of a design. Such ability to obfuscate the hierarchy is particularly important for designs that contain repeated modules. In this paper, we propose a novel way to obfuscate such designs by leveraging conventional logic synthesis. We exploit multiple optimizations that are available in the synthesis tool to create design diversity. Our security analysis, performed by using the DANA reverse engineering tool, confirms the significant impact of these optimizations on obfuscation. Among the many considered obfuscated design instances, users can find options that incur very small overheads while still confusing the work of a reverse engineer.

翻译：许多安全威胁来自集成电路(IC)生态系统中不受信任的参与者,其中令人担心的是,旨在伪造、过度生产或修改IC的反向工程做法。近年来,提出了各种技术来减轻上述威胁,但似乎没有技术足以掩盖设计等级。这种混淆等级的能力对于包含重复模块的设计特别重要。在本文件中,我们提出了一个新的方法,通过利用常规逻辑合成来混淆这种设计。我们利用合成工具中的多种优化方法来创造设计多样性。我们利用DANA反向工程工具进行的安全分析证实了这些优化对模糊化的重大影响。在许多被认为模糊不清的设计实例中,用户可以找到一些选择,这些选择在仍然混淆反向工程师的工作的同时,产生非常小的间接成本。