Spiking neural networks (SNNs) are a promising paradigm for energy-efficient event-driven computation, but large-scale SNN execution remains challenging because sparse spike communication and synchronization can dominate runtime. Existing solutions across CPU, GPU, ASIC, and FPGA platforms offer different trade-offs between programmability, efficiency, and scalability. To address this gap, we present NeuroRing, a modular and scalable SNN accelerator based on a stream-dataflow architecture and a bidirectional ring topology, implemented in High-Level Synthesis (HLS) on FPGAs. NeuroRing supports modular single- and multi-FPGA deployment and is compatible with existing SNN workflows through integration with the NEST simulator. We evaluate NeuroRing on the cortical microcircuit benchmark and a Sudoku constraint-satisfaction workload. Results show that NeuroRing preserves the key activity statistics of the NEST reference model, achieves faster-than-real-time execution of the full-scale cortical microcircuit with a real-time factor (RTF) of 0.83, exhibits meaningful strong and weak scaling, and provides competitive energy efficiency on two programmable FPGAs. These results position NeuroRing as a flexible and scalable platform for both neuroscience simulation and broader event-driven applications.

翻译：脉冲神经网络（SNN）凭借其能高效进行事件驱动计算的潜力而备受关注，但大规模SNN执行仍面临挑战，因为稀疏脉冲通信与同步可能占据主导运行时间。现有基于CPU、GPU、ASIC和FPGA平台的解决方案在可编程性、效率与可扩展性之间提供了不同权衡。为填补这一空白，我们提出NeuroRing——一种基于流数据流架构与双向环拓扑的模块化可扩展SNN加速器，并在FPGA上通过高层次综合（HLS）实现。NeuroRing支持模块化的单FPGA与多FPGA部署，并通过与NEST模拟器的集成兼容现有SNN工作流程。我们基于皮层微回路基准测试与数独约束满足任务对NeuroRing进行评估。结果表明，NeuroRing在保持NEST参考模型关键活动统计量的同时，实现了全规模皮层微回路的超实时执行（实时因子RTF为0.83），展现出显著的强扩展性与弱扩展性，并在两款可编程FPGA上提供了具有竞争力的能效。这些成果将NeuroRing定位为神经科学模拟及更广泛事件驱动应用的灵活可扩展平台。