Spiking Neural Networks (SNNs) provide a naturally temporal machine-learning framework. Their neurons maintain an internal state and propagate information through discrete spikes, enabling low-latency temporal inference. Although SNNs are often associated with asynchronous neuromorphic processors, many scientific real-time inference systems rely on conventional synchronous field-programmable gate arrays (FPGAs) and high-level synthesis (HLS) workflows. In this paper we present an extension of hls4ml that enables clock-driven deployment of SNNs trained in pytorch onto FPGA firmware. We demonstrate the workflow using a dense quantised SNN trained on the Heidelberg Spiking Digits dataset where it achieves inference latencies of approximately $34μ$s. We validate the generated design through software reference comparisons, HLS C simulation, HLS synthesis, export, and Vivado synthesis reports. This work opens up the hls4ml toolkit to neuromorphic computing, allowing streamlined optimisation, synthesis, and deployment of SNN models for real-time inference.

翻译：脉冲神经网络（SNN）提供了一种天然的时序机器学习框架。其神经元通过维持内部状态并以离散脉冲传递信息，能够实现低延迟的时序推理。尽管SNN常与异步神经形态处理器相关联，但许多科学实时推理系统仍依赖于传统的同步现场可编程门阵列（FPGA）与高层次综合（HLS）工作流。本文提出一种hls4ml的扩展方法，可将基于PyTorch训练的SNN以时钟驱动方式部署至FPGA固件。我们使用在海德堡脉冲数字数据集上训练的密集量化SNN验证该工作流，其推理延迟约为34μs。通过软件参考对比、HLS C仿真、HLS综合、导出及Vivado综合报告，验证了所生成设计的正确性。本工作将hls4ml工具包拓展至神经形态计算领域，实现了SNN模型的流畅优化、综合与实时推理部署。