Spiking neural networks (SNNs) provide event-driven and low-power computation inspired by biological neural systems, but current implementations rely on von Neumann graphics processing units (GPUs) and central processing units (CPUs) platforms, where memory and computation bottlenecks limit energy efficiency. To address this challenge, this paper proposes an analog memristor-based spiking neural network (SNN) accelerator that integrates in-memory synaptic computation with analog integrate-and-fire (IF) neurons, eliminating multi-transistor CMOS synapse circuits and enabling asynchronous event-driven operation at the 45nm technology node. Additionally, a digital SNN accelerator is designed and optimized at the 5 nm technology node for comparison. The proposed architecture is evaluated using a predator-prey tracking task that emulates pursuit behavior. In this task, the analog SNN accelerator's inference closely matches the ideal software inference with a mean squared error (MSE) of 0.004. HSPICE simulation results show that the proposed analog SNN accelerator achieves 12.7 times lower energy consumption and 1.26 times lower delay compared to the digital baseline, demonstrating the potential of memristor-based neuromorphic circuits for energy-efficient real-time edge intelligence.

翻译：脉冲神经网络（SNN）受生物神经系统启发，可实现事件驱动与低功耗计算，然而当前实现依赖冯·诺依曼架构的图形处理器（GPU）与中央处理器（CPU）平台，其存储与计算瓶颈限制了能效。为应对这一挑战，本文提出一种基于模拟忆阻器的脉冲神经网络（SNN）加速器，该加速器将存储内突触计算与模拟整合发放（IF）神经元集成于一体，消除了多晶体管CMOS突触电路，并在45nm工艺节点上实现异步事件驱动操作。此外，为进行对比，在5nm工艺节点设计并优化了一种数字SNN加速器。通过模拟捕食者-猎物追踪任务（模拟追逐行为）对所提架构进行评估。在该任务中，模拟SNN加速器的推理结果与理想软件推理结果高度一致，均方误差（MSE）仅为0.004。HSPICE仿真结果表明，与数字基准相比，所提模拟SNN加速器能耗降低12.7倍，延迟降低1.26倍，证明了基于忆阻器的神经形态电路在实现高效能实时边缘智能方面的潜力。