The widening gap between processor speed and storage latency has made data movement a dominant bottleneck in modern systems. Two lines of storage-layer innovation attempted to close this gap: persistent memory shortened the latency hierarchy, while computational storage devices pushed processing toward the data. Neither has displaced conventional NVMe SSDs at scale, largely due to programming complexity, ecosystem fragmentation, and thermal/power cliffs under sustained load. We argue that storage-side compute should be \emph{reversible}: computation should migrate dynamically between host and device based on runtime conditions. We present \sys, which realizes this principle on CXL SSDs by decomposing I/O-path logic into migratable \emph{storage actors} compiled to WebAssembly. Actors share state through coherent CXL.mem regions; an agility-aware scheduler migrates them via a zero-copy drain-and-switch protocol when thermal or power constraints arise. Our evaluation on an FPGA-based CXL SSD prototype and two production CSDs shows that \sys turns hard thermal cliffs into elastic trade-offs, achieving up to 2$\times$ throughput improvement and 3.75$\times$ write latency reduction without application modification.

翻译：处理器速度与存储延迟之间日益扩大的差距，使得数据迁移成为现代系统中的主导瓶颈。存储层的两项创新试图弥合这一差距：持久内存缩短了延迟层级，而计算型存储设备则将处理能力推向数据端。然而，由于编程复杂性、生态系统碎片化以及持续负载下的热/功耗瓶颈，这两项技术均未能大规模取代传统NVMe SSD。我们认为，存储端计算应具备"可逆性"：计算能力应能根据运行时条件在主机与设备之间动态迁移。我们提出\sys系统，通过将I/O路径逻辑分解为编译为WebAssembly的可迁移"存储角色"，在CXL SSD上实现这一原则。这些角色通过一致性CXL.mem区域共享状态；当出现热约束或功耗约束时，敏捷感知调度器通过零拷贝的排出-切换协议迁移角色。基于FPGA的CXL SSD原型以及两款商用CSD的评估表明，\sys系统能将硬性热约束瓶颈转化为弹性权衡，在无需修改应用程序的情况下，实现高达2倍的吞吐量提升和3.75倍的写延迟降低。