In the "Big Data" era, a lot of data must be processed and moved between processing and memory units. New technologies and architectures have emerged to improve system performance and overcome the memory bottleneck. The memristor is a technology with both computing and memory capabilities. In-Memory Computing (IMC) can be performed by applying memristors to stateful design methods. The Fast and Energy-Efficient Logic in Memory (FELIX) logic is one of the stateful implementation logics compatible with memristive crossbar arrays. The way computations are performed can be changed to improve performance. Approximate design methods can be applied in error-resilient applications. In error-resilient applications, an acceptable amount of precision is lost while features such as hardware complexity, latency, and energy are improved. In this paper, using these two concepts, an approximate full adder circuit with exact Cout and approximate Sum outputs has been proposed using the FELIX design method for IMC in two different implementation approaches. The applied memristor count in the proposed FELIX-based Approximate Full Adder (FAFA) in the two proposed implementation approaches (FAFA1 and FAFA2) is improved by 14.28% and 28.57%, energy consumption is improved by 73.735% and 81.754%, respectively. The number of computational steps in both approaches is improved by 66.66% compared to the exact FELIX-based full adder. In this paper, two different scenarios are considered for evaluating the FAFA. In the 1st and 2nd scenarios, respectively, for the three and four Most Significant Bits (MSBs), the exact full adder is used, and for the five and four Least Significant Bits (LSBs), the FAFA is used. The results of error analysis and evaluations of the FAFA in three different image processing applications confirmed that FAFA has high accuracy and acceptable performance.

翻译：在"大数据"时代，大量数据需要在处理单元与存储单元之间进行传输和处理。为提升系统性能并克服内存瓶颈，新兴技术与架构不断涌现。忆阻器是一种兼具计算与存储能力的技术。通过将忆阻器应用于状态逻辑设计方法，可实现内存计算。快速节能内存逻辑（FELIX）是一种与忆阻器交叉阵列兼容的状态逻辑实现方法。通过改变计算执行方式可提升系统性能。在容错应用中可采用近似设计方法，该方法在可接受的精度损失范围内，能有效改善硬件复杂度、延迟和能耗等特性。本文融合这两种理念，基于FELIX设计方法提出了两种不同实现方案的近似全加器电路，该电路具有精确进位输出和近似和输出。在两种实现方案（FAFA1与FAFA2）中，所提出的基于FELIX的近似全加器（FAFA）的忆阻器使用量分别优化了14.28%和28.57%，能耗分别降低了73.735%和81.754%。两种方案的计算步骤数相较于精确型FELIX全加器均减少了66.66%。本文设定了两种不同场景评估FAFA性能：在第一和第二场景中，分别对三个和四个最高有效位采用精确全加器，对五个和四个最低有效位采用FAFA。通过在三种不同图像处理应用中的误差分析与性能评估，结果证实FAFA具有高精度与可接受的性能表现。