We present a design-technology tradeoff analysis in implementing machine-learning inference on the processing cores of a Non-Volatile Memory (NVM)-based many-core neuromorphic hardware. Through detailed circuit-level simulations for scaled process technology nodes, we show the negative impact of design scaling on read endurance of NVMs, which directly impacts their inference lifetime. At a finer granularity, the inference lifetime of a core depends on 1) the resistance state of synaptic weights programmed on the core (design) and 2) the voltage variation inside the core that is introduced by the parasitic components on current paths (technology). We show that such design and technology characteristics can be incorporated in a design flow to significantly improve the inference lifetime.

翻译：在对基于非挥发性内存(NVM)的多核心神经形态硬件的处理核心进行机械学习推论时,我们提出了一个设计-技术权衡分析。通过对规模化工艺技术节点进行详细的电路级模拟,我们展示了对NVMS的读耐力进行设计缩放的消极影响,直接影响到其推导寿命。在细微颗粒度下,核心的推论寿命取决于:(1) 核心(设计)的合成重量的抗力状态;(2) 由当前路径(技术)的寄生物组件引入的核心内电压变化。我们表明,这种设计和技术特性可以纳入设计流,以大大改进推导寿命。