The advance of autonomous Smart Sensor Networks and embedded systems for the Internet of Things, powered by photovoltaic energy harvesting, is severely limited by energy efficiency, especially in low-light environments. While Dynamic Power Management is essential for energy conservation, conventional software-based techniques that rely on processor-managed low-power states incur a persistent quiescent current drain. This current becomes the dominant energy sink in energy-scarce conditions, limiting autonomy. The work of this paper addresses this limitation by introducing a robust, hardware-orchestrated dynamic power management architecture that improves existing configurations for battery-based sensor nodes. The proposed architecture achieves a minimal quiescent drain of 452nA, by completely power-gating the microcontroller and all non-essential peripherals, with wake-up orchestrated by an ultra-low-power PMIC, RTC and a novel latch circuit developed specifically for this work. Our evaluation demonstrates that the dynamic power management architecture is significantly more efficient than traditional software-based sleep modes.

翻译：自主智能传感器网络及物联网嵌入式系统依赖光伏能量采集供电，其发展严重受限于能源效率，尤其在低光照环境中。动态功耗管理虽对节能至关重要，但传统基于软件的功耗管理技术依赖处理器管理的低功耗状态，会持续产生静态漏电流。在能源稀缺条件下，该漏电流成为主要能耗源，限制系统自主运行能力。本文针对此局限，提出一种稳健的硬件协调动态功耗管理架构，可改进现有电池型传感器节点的配置。该架构通过完全电源门控微控制器及所有非必要外设，结合超低功耗PMIC、RTC及本文专门设计的锁存电路实现唤醒，达到452nA的最小静态漏电流。评估表明，该动态功耗管理架构较传统软件休眠模式具有显著更高的能效。