Stencil computation is one of the most used kernels in a wide variety of scientific applications, ranging from large-scale weather prediction to solving partial differential equations. Stencil computations are characterized by three unique properties: (1) low arithmetic intensity, (2) limited temporal data reuse, and (3) regular and predictable data access pattern. As a result, stencil computations are typically bandwidth-bound workloads, which only experience limited benefits from the deep cache hierarchy of modern CPUs. In this work, we propose Casper, a near-cache accelerator consisting of specialized stencil compute units connected to the last-level cache (LLC) of a traditional CPU. Casper is based on two key ideas: (1) avoiding the cost of moving rarely reused data through the cache hierarchy, and (2) exploiting the regularity of the data accesses and the inherent parallelism of the stencil computation to increase the overall performance. With minimal changes in LLC address decoding logic and data placement, Casper performs stencil computations at the peak bandwidth of the LLC. We show that, by tightly coupling lightweight stencil compute units near to LLC, Casper improves the performance of stencil kernels by 1.65x on average, while reducing the energy consumption by 35% compared to a commercial high-performance multi-core processor. Moreover, Casper provides a 37x improvement in performance-per-area compared to a state-of-the-art GPU.

翻译：模板计算是广泛应用领域（从大规模天气预报到偏微分方程求解）中最常用的内核之一。模板计算具有三个独特特性：（1）低算术强度，（2）有限的时间性数据重用，以及（3）规则且可预测的数据访问模式。因此，模板计算通常属于带宽受限的工作负载，从现代CPU深层缓存层次结构中获得的收益有限。本文提出了Casper，一种近缓存加速器，由连接到传统CPU末级缓存（LLC）的专用模板计算单元组成。Casper基于两个关键思想：（1）避免通过缓存层次结构移动极少重用数据的成本，以及（2）利用数据访问的规则性和模板计算固有的并行性来提升整体性能。通过对LLC地址解码逻辑和数据放置进行最小改动，Casper在LLC峰值带宽下执行模板计算。研究表明，通过在LLC附近紧密耦合轻量级模板计算单元，Casper平均将模板内核性能提升1.65倍，同时与商业高性能多核处理器相比降低35%的能耗。此外，与最先进的GPU相比，Casper在每面积性能上实现37倍提升。