We present Virtual Secure Platform (VSP), the first comprehensive platform that implements a multi-opcode general-purpose sequential processor over Fully Homomorphic Encryption (FHE) for Secure Multi-Party Computation (SMPC). VSP protects both the data and functions on which the data are evaluated from the adversary in a secure computation offloading situation like cloud computing. We proposed a complete processor architecture with a five-stage pipeline, which improves the performance of the VSP by providing more parallelism in circuit evaluation. In addition, we also designed a custom Instruction Set Architecture (ISA) to reduce the gate count of our processor, along with an entire set of toolchains to ensure that arbitrary C programs can be compiled into our custom ISA. In order to speed up instruction evaluation over VSP, CMUX Memory based ROM and RAM constructions over FHE are also proposed. Our experiments show that both the pipelined architecture and the CMUX Memory technique are effective in improving the performance of the proposed processor. We provide an open-source implementation of VSP which achieves a per-instruction latency of less than 1 second. We demonstrate that compared to the best existing processor over FHE, our implementation runs nearly 1,600$\times$ faster.

翻译：我们提出了虚拟安全平台(VSP),这是第一个实施全成式加密通用多操作通用连续处理器(FHE),用于安全多党计算(SMPC)的多功能通用连续处理器(FHE),以安全的方式,如云计算(云计算),从对手处保护数据评估的数据和功能。我们提议了一个完整的处理器结构,配有五阶段管道,通过在电路评估中提供更多的平行性来改善VSP的性能。此外,我们还设计了一个定制指示设置架构(ISA),以减少我们处理器的门数,同时设计了一整套工具链,以确保将任意的C程序汇编到我们的定制的ISA中。为了加快对VSP、CMUX存储器和FHE的内存结构的指令评价,我们还提议在FHE上进行。我们的实验表明,管道架构和CMUX记忆技术在改进拟议处理器的性能方面都有效。我们提供了开放源的VSP,以最优的方式实现人均维持费用不到1600美元的执行速度。