Agile hardware design flows are a critically needed force multiplier to meet the exploding demand for compute. Recently, agentic generative AI systems have demonstrated significant advances in algorithm design, improving code efficiency, and enabling discovery across scientific domains. Bridging these worlds, we present ArchAgent, an automated computer architecture discovery system built on AlphaEvolve. We show ArchAgent's ability to automatically design/implement state-of-the-art (SoTA) cache replacement policies (architecting new mechanisms/logic, not only changing parameters), broadly within the confines of an established cache replacement policy design competition. In two days without human intervention, ArchAgent generated a policy achieving a 5.3% IPC speedup improvement over the prior SoTA on public multi-core Google Workload Traces. On the heavily-explored single-core SPEC06 workloads, it generated a policy in just 18 days showing a 0.9% IPC speedup improvement over the existing SoTA (a similar "winning margin" as reported by the existing SoTA). ArchAgent achieved these gains 3-5x faster than prior human-developed SoTA policies. Agentic flows also enable "post-silicon hyperspecialization" where agents tune runtime-configurable parameters exposed in hardware policies to further align the policies with a specific workload (mix). Exploiting this, we demonstrate a 2.4% IPC speedup improvement over prior SoTA on SPEC06 workloads. Finally, we outline broader implications for computer architecture research in the era of agentic AI. For example, we demonstrate the phenomenon of "simulator escapes", where the agentic AI flow discovered and exploited a loophole in a popular microarchitectural simulator - a consequence of the fact that these research tools were designed for a (now past) world where they were exclusively operated by humans acting in good-faith.

翻译：敏捷硬件设计流程是满足爆炸式计算需求的关键生产力倍增器。近期，智能体生成式人工智能系统在算法设计、代码效率提升及跨科学领域发现方面展现出显著进展。为融合这两个领域，我们提出了ArchAgent——一个基于AlphaEvolve构建的自动化计算机体系结构发现系统。我们展示了ArchAgent在既定缓存替换策略设计竞赛框架内，自动设计/实现最先进缓存替换策略的能力（不仅调整参数，更构建新机制/逻辑）。在无人干预的两天内，ArchAgent生成的策略在公开多核Google工作负载追踪数据上实现了5.3%的IPC加速提升，超越先前最优方案。在已被深入研究的单核SPEC06工作负载上，仅用18天生成的策略显示出0.9%的IPC加速提升（与现有最优方案报告的"获胜优势"相当）。ArchAgent以比人类开发的最优方案快3-5倍的速度达成这些成果。智能体流程还支持"硅后超专业化"，即智能体通过调整硬件策略中暴露的运行时可配置参数，使策略进一步适配特定工作负载（组合）。利用此特性，我们在SPEC06工作负载上实现了2.4%的IPC加速提升，超越先前最优方案。最后，我们概述了智能体人工智能时代对计算机体系结构研究的更广泛影响。例如，我们展示了"模拟器逃逸"现象：智能体人工智能流程发现并利用了流行微架构模拟器中的漏洞——这源于这些研究工具原本专为（现已过时的）人类善意操作场景而设计的事实。