The accuracy requirements in many scientific computing workloads result in the use of double-precision floating-point arithmetic in the execution kernels. Nevertheless, emerging real-number representations, such as posit arithmetic, show promise in delivering even higher accuracy in such computations. In this work, we explore the native use of 64-bit posits in a series of numerical benchmarks extracted from the PolyBench collection and compare their timing performance, accuracy and hardware cost to IEEE 754 doubles. For this, we extend the PERCIVAL RISC-V core and the Xposit custom RISC-V extension with posit64 and quire operations. Results show that posit64 can execute as fast as doubles, while also obtaining up to 4 orders of magnitude lower mean square error and up to 3 orders of magnitude lower maximum absolute error. However, leveraging the quire accumulator register can limit the order of some operations such as matrix multiplications. Furthermore, detailed FPGA synthesis results highlight the significant hardware cost of 64-bit posit arithmetic and quire. Despite this, the large accuracy improvements achieved with the same memory bandwidth suggest that posit arithmetic may provide a potential alternative representation for scientific computing.

翻译：许多科学计算工作负载对精度的要求导致在执行内核中使用双精度浮点运算。然而，新兴的实数表示法（如posit算术）在对此类计算实现更高精度方面展现出潜力。本研究从PolyBench基准集中提取一系列数值测试程序，探索原生应用64位posit算术，并将其时间性能、精度及硬件成本与IEEE 754双精度浮点数进行对比。为此，我们扩展了PERCIVAL RISC-V内核及Xposit自定义RISC-V扩展以支持posit64与quire操作。结果表明，posit64在保持与双精度浮点数相同的执行速度的同时，均方误差降低达4个数量级，最大绝对误差降低达3个数量级。然而，利用quire累加器寄存器可能限制某些运算（如矩阵乘法）的运算顺序。此外，详细的FPGA综合结果凸显了64位posit算术及quire架构的显著硬件开销。尽管如此，在相同内存带宽下实现的较大精度提升表明，posit算术可能为科学计算提供一种潜在的替代表示方案。