Graph dynamic random walks (GDRWs) have recently emerged as a powerful paradigm for graph analytics and learning applications, including graph embedding and graph neural networks. Despite the fact that many existing studies optimize the performance of GDRWs on multi-core CPUs, massive random memory accesses and costly synchronizations cause severe resource underutilization, and the processing of GDRWs is usually the key performance bottleneck in many graph applications. This paper studies an alternative architecture, FPGA, to address these issues in GDRWs, as FPGA has the ability of hardware customization so that we are able to explore fine-grained pipeline execution and specialized memory access optimizations. Specifically, we propose {LightRW}, a novel FPGA-based accelerator for GDRWs. LightRW embraces a series of optimizations to enable fine-grained pipeline execution on the chip and to exploit the massive parallelism of FPGA while significantly reducing memory accesses. As current commonly used sampling methods in GDRWs do not efficiently support fine-grained pipeline execution, we develop a parallelized reservoir sampling method to sample multiple vertices per cycle for efficient pipeline execution. To address the random memory access issues, we propose a degree-aware configurable caching method that buffers hot vertices on-chip to alleviate random memory accesses and a dynamic burst access engine that efficiently retrieves neighbors. Experimental results show that our optimization techniques are able to improve the performance of GDRWs on FPGA significantly. Moreover, LightRW delivers up to 9.55x and 9.10x speedup over the state-of-the-art CPU-based MetaPath and Node2vec random walks, respectively. This work is open-sourced on GitHub at https://github.com/Xtra-Computing/LightRW.

翻译：图动态随机游走（GDRWs）近期已成为图分析与学习应用（包括图嵌入和图神经网络）的强大范式。尽管许多现有研究在多核CPU上优化了GDRW的性能，但大量随机内存访问和昂贵的同步操作导致资源严重利用不足，而GDRW的处理通常是许多图应用中的关键性能瓶颈。本文研究了另一种架构——FPGA，以解决GDRW中的这些问题，因为FPGA具备硬件定制能力，从而能够探索细粒度流水线执行和专用内存访问优化。具体而言，我们提出了LightRW，一种基于FPGA的新型GDRW加速器。LightRW采用一系列优化策略，在芯片上实现细粒度流水线执行，并充分利用FPGA的大规模并行性，同时显著减少内存访问。由于当前GDRW中常用的采样方法无法有效支持细粒度流水线执行，我们开发了一种并行化蓄水池采样方法，每个周期采样多个顶点以实现高效流水线执行。为解决随机内存访问问题，我们提出了一种度感知可配置缓存方法，在芯片上缓冲热顶点以缓解随机内存访问，以及一种动态突发访问引擎，高效检索邻居节点。实验结果表明，我们的优化技术能够在FPGA上显著提升GDRW的性能。此外，与基于CPU的最先进MetaPath和Node2vec随机游走相比，LightRW分别实现了高达9.55倍和9.10倍的加速。本工作已在GitHub上开源，地址为https://github.com/Xtra-Computing/LightRW。