In this work we unify two existing lines of work towards cache analysis for non-LRU policies. To this end, we extend the notion of competitiveness to block competitiveness and systematically analyze the competitiveness and block competitiveness of FIFO and MRU relative to LRU for arbitrary associativities. We show how competitiveness and block competitiveness can be exploited in state-of-the-art WCET analysis based on the results of existing persistence analyses for LRU. Unlike prior work, our approach is applicable to microarchitectures that exhibit timing anomalies. We experimentally evaluate the precision and cost of our approach on benchmarks from TACLeBench. The experiments demonstrate that quantitative cache analysis for FIFO and MRU comes close to the precision of LRU.

翻译：本研究整合了面向非LRU策略缓存分析的现有两条研究路线。为此，我们将竞争性概念扩展为块竞争性，并系统分析了任意关联度下FIFO和MRU相对于LRU的竞争性与块竞争性。基于现有LRU持续性分析的结果，我们展示了如何将竞争性与块竞争性应用于最先进的WCET分析。与先前工作不同，我们的方法适用于存在时序异常的微架构。我们在TACLeBench基准测试集上实验评估了所提方法的精度与开销。实验表明，针对FIFO和MRU的量化缓存分析在精度上已接近LRU分析的水平。