Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidates for such purposes due to their high-speed and reconfigurable architecture. In this paper, we introduce our Makinote, an FPGA-based Cluster platform, hosted at Barcelona Supercomputing Center (BSC-CNS), which is composed of a large number of FPGAs (in total 96 AMD/Xilinx Alveo U55c) to emulate massive size RTL designs (up to 750M ASIC cells). In addition, we introduce our FPGA shell as a powerful tool to facilitate the utilization of such a large FPGA cluster with minimal effort needed by the designers. The proposed FPGA shell provides an easy-to-use interface for the RTL developers to rapidly port such design into several FPGAs by automatically connecting to the necessary ports, e.g., PCIe Gen4, DRAM (DDR4 and HBM), ETH10g/100g. Moreover, specific drivers for exploiting RISC-V based architectures are provided within the set of tools associated with the FPGA shell. We release the tool online for further extensions. We validate the efficiency of our hardware platform (i.e., FPGA cluster) and the software tool (i.e., FPGA Shell) by emulating a RISC-V processor and experimenting HPC Challenge application running on 32 FPGAs. Our results demonstrate that the performance improves by 8 times over the single-FPGA case.

翻译：在芯片流片前对其功能进行仿真至关重要，尤其是在基于RISC-V的设计日益普及的背景下。FPGA凭借其高速和可重构架构，成为实现此类仿真的理想候选方案。本文介绍了我们开发的Makinote——一个托管于巴塞罗那超算中心（BSC-CNS）的FPGA集群平台，该平台由大量FPGA（总计96片AMD/Xilinx Alveo U55c）组成，可仿真大规模RTL设计（高达7.5亿ASIC门级单元）。此外，我们提出了一种FPGA shell，作为强大工具可帮助设计人员以最小工作量高效利用此类大型FPGA集群。该FPGA shell为RTL开发者提供了简易接口，可通过自动连接必要端口（如PCIe Gen4、DRAM（DDR4和HBM）、ETH10g/100g）快速将设计移植到多个FPGA上。同时，在FPGA shell关联的工具集中，我们提供了针对基于RISC-V架构的专用驱动。该工具已在线开源以供后续扩展。我们通过仿真一个RISC-V处理器并在32片FPGA上运行HPC Challenge应用程序，验证了硬件平台（FPGA集群）和软件工具（FPGA Shell）的效率。实验结果表明，相较于单FPGA方案，性能提升了8倍。