Reconfigurable intelligent surfaces (RISs) are anticipated to transform wireless communication in a way that is both economical and energy efficient. Revealing the practical power consumption characteristics of RISs can provide an essential toolkit for the optimal design of RIS-assisted wireless communication systems and energy efficiency performance evaluation. Based on our previous work that modeled the dynamic power consumption of RISs, we henceforth concentrate more on static power consumption. We first divide the RIS hardware into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The first two parts are mainly to be investigated and the last part has been modeled as the dynamic power consumption in the previous work. In this work, the power consumption of the FPGA control board is regarded as a constant value, however, that of the drive circuit is a variant that is affected by the number of control signals and its self-power consumption characteristics. Therefore, we model the power consumption of the drive circuits of various kinds of RISs, i.e., PIN diode-/Varactor diode-/RF switch-based RIS. Finally, the measurement results and typical value of static power consumption are illustrated and discussed.

翻译：可重构智能表面有望以经济高效且节能的方式变革无线通信。揭示RIS的实际功耗特性可为RIS辅助无线通信系统的优化设计及能效性能评估提供关键工具箱。基于我们先前对RIS动态功耗建模的研究，本文进一步聚焦于静态功耗。首先将RIS硬件划分为三个基本组成部分：FPGA控制板、驱动电路和RIS单元结构。前两部分是主要研究对象，最后一部分已在先前工作中建模为动态功耗。本研究中，FPGA控制板的功耗被视为恒定值，但驱动电路功耗会受控制信号数量及其自身功耗特性影响而发生变化。因此，我们对不同种类RIS（即基于PIN二极管/变容二极管/射频开关的RIS）的驱动电路功耗进行建模。最后，展示并讨论了静态功耗的测量结果与典型值。