Massive MIMO is a cornerstone of next-generation wireless communication, offering significant gains in capacity, reliability, and energy efficiency. However, to meet emerging demands such as high-frequency operation, wide bandwidths, co-existence, integrated sensing, and resilience to dynamic interference, future systems must exhibit both scalability and spectral agility. These requirements place increasing pressure on the underlying processing hardware to be both efficient and reconfigurable. This paper proposes a custom-designed spatial array architecture that serves as a reconfigurable, general-purpose core optimized for a class of wireless kernels that commonly arise in diverse communications and sensing tasks. The proposed spatial array is evaluated against specialized cores for each kernel using High-Level Synthesis (HLS). Both the reconfigurable and specialized designs are synthesized in a 32 nm process to assess latency, throughput, area, and power in realistic processes. The results identify conditions under which general-purpose systolic architectures can approach the efficiency of specialized cores, thereby paving the way toward more scalable and agile systems.

翻译：大规模MIMO是下一代无线通信的基石，可为容量、可靠性和能效带来显著提升。然而，为满足高频操作、宽带宽、共存机制、集成感知及动态干扰抗性等新兴需求，未来系统必须兼具可扩展性与频谱敏捷性。这些要求对底层处理硬件的高效性与可重构性提出了日益增长的压力。本文提出一种定制设计的空间阵列架构，该架构作为可重构的通用核心，针对各类通信与感知任务中常见的无线计算核心进行了优化。通过高层次综合（HLS）技术，将所提出的空间阵列与各计算核心的专用核心进行对比评估。在32纳米工艺下对可重构设计与专用设计进行综合，以在实际工艺中评估其延迟、吞吐量、面积和功耗。研究结果明确了通用脉动阵列架构在何种条件下能够逼近专用核心的效率，从而为构建更具可扩展性和敏捷性的系统铺平道路。