RAVENS is a neuroprocessor that has been developed by the TENNLab research group at the University of Tennessee. Its main focus has been as a vehicle for chip design with memristive elements; however it has also been the vehicle for all-digital CMOS development, plus it has implementations on FPGA's, microcontrollers and software simulation. The software simulation is supported by the TENNLab neuromorphic software framework so that researchers may develop RAVENS solutions for a variety of neuromorphic computing applications. This document provides a functional specification of RAVENS that should apply to all implementations of the RAVENS neuroprocessor.

翻译：RAVENS是田纳西大学TENNLab研究团队开发的一款神经处理器。其首要定位是作为含忆阻元件芯片设计的载体，同时也是全数字CMOS开发的验证平台，并已在FPGA、微控制器及软件仿真中实现。软件仿真依托TENNLab神经形态软件框架，使研究人员能够为各类神经形态计算应用开发基于RAVENS的解决方案。本文档提供适用于所有RAVENS神经处理器实现的功能规范。