IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor systems-on-chip (MPSoCs) for edge computing. The RISC-V ISA has grown in academia and industry due to its flexibility. Still, available open-source cores cannot be seamlessly integrated into MPSoCs for a fast time to market. This paper presents NoX, a compact open-source plug-and-play 32-bit RISC-V core designed in System Verilog for efficient data processing in MPSoCs. NoX has a 4-stage single-issue in-order pipeline with full bypass, providing an efficient resource-constrained architecture. Compared to industry and academia resource-constrained RISC-V cores, NoX offers a better resource usage and performance trade-off.

翻译：物联网应用因其资源受限特性，成为推动系统能效与功耗优化的重要驱动力。然而基于安全、延迟与传输效率考量，我们主张通过多处理器片上系统（MPSoC）实现边缘计算的本地化处理。RISC-V指令集架构凭借其灵活性已在学术界和工业界获得广泛应用，但现有开源处理器核仍无法快速无缝集成至MPSoC以缩短产品上市周期。本文提出NoX——一款采用System Verilog设计的紧凑型开源即插即用32位RISC-V处理器核，专为MPSoC高效数据处理而设计。NoX采用四级单发射顺序流水线架构并配备完整旁路机制，实现了高效的资源受限架构。相较于工业界和学术界的资源受限型RISC-V处理器核，NoX在资源利用与性能权衡方面展现出更优表现。