Neuro-symbolic artificial intelligence (AI) excels at learning from noisy and generalized patterns, conducting logical inferences, and providing interpretable reasoning. Comprising a 'neuro' component for feature extraction and a 'symbolic' component for decision-making, neuro-symbolic AI has yet to fully benefit from efficient hardware accelerators. Additionally, current hardware struggles to accommodate applications requiring dynamic resource allocation between these two components. To address these challenges-and mitigate the typical data-transfer bottleneck of classical Von Neumann architectures-we propose a ferroelectric charge-domain compute-in-memory (CiM) array as the foundational processing element for neuro-symbolic AI. This array seamlessly handles both the critical multiply-accumulate (MAC) operations of the 'neuro' workload and the parallel associative search operations of the 'symbolic' workload. To enable this approach, we introduce an innovative 1FeFET-1C cell, combining a ferroelectric field-effect transistor (FeFET) with a capacitor. This design, overcomes the destructive sensing limitations of DRAM in CiM applications, while capable of capitalizing decades of DRAM expertise with a similar cell structure as DRAM, achieves high immunity against FeFET variation-crucial for neuro-symbolic AI-and demonstrates superior energy efficiency. The functionalities of our design have been successfully validated through SPICE simulations and prototype fabrication and testing. Our hardware platform has been benchmarked in executing typical neuro-symbolic AI reasoning tasks, showing over 2x improvement in latency and 1000x improvement in energy efficiency compared to GPU-based implementations.
翻译:神经符号人工智能(AI)擅长从噪声和泛化模式中学习、进行逻辑推理并提供可解释的推断。神经符号AI包含用于特征提取的“神经”组件和用于决策的“符号”组件,但尚未充分受益于高效的硬件加速器。此外,现有硬件难以适应需要在这两个组件之间动态分配资源的应用。为应对这些挑战——并缓解经典冯·诺依曼架构中典型的数据传输瓶颈——我们提出了一种铁电电荷域存内计算(CiM)阵列,作为神经符号AI的基础处理单元。该阵列能无缝处理“神经”工作负载的关键乘累加(MAC)运算和“符号”工作负载的并行关联搜索运算。为实现这一方法,我们引入了一种创新的1FeFET-1C单元,将铁电场效应晶体管(FeFET)与电容器相结合。该设计克服了动态随机存取存储器(DRAM)在CiM应用中的破坏性读出限制,同时能够借鉴数十年DRAM技术积累(因其单元结构与DRAM相似),实现了对FeFET工艺变异的高鲁棒性——这对神经符号AI至关重要——并展现出卓越的能效。我们通过SPICE仿真以及原型制造与测试,成功验证了该设计的功能。我们的硬件平台在执行典型神经符号AI推理任务时进行了基准测试,结果显示与基于GPU的实现相比,延迟降低超过2倍,能效提升达1000倍。