Gate elimination is the primary technique for proving explicit lower bounds against general Boolean circuits, including Li and Yang's state-of-the-art $3.1n - o(n)$ bound for affine dispersers (STOC 2022). Every circuit lower bound is implicitly existential: every circuit that is too small to compute $f$ must err on some input. This raises a natural question: are these lower bounds \emph{constructive}? That is, can we efficiently produce such errors? Chen, Jin, Santhanam, and Williams showed that constructivity plays a central role in many longstanding open problems in complexity theory, and explicitly raised the question of which circuit lower bound techniques can be made constructive (FOCS 2021). We show that a variety of gate elimination arguments yield refuters -- efficient algorithms that, when given a circuit that is too small to compute a function $f$, produce an input on which the circuit errs. Our results range from elementary lower bounds for $XOR$ and the multiplexer to more sophisticated arguments for affine dispersers. Underlying these results is a shift in perspective: gate elimination arguments \emph{are} algorithms. Each step either simplifies the circuit or reveals a violation of some structural or functional property, from which, with a little additional work, explicit counterexamples can be extracted. We further strengthen the $XOR$ result to handle circuits that \emph{match} the lower bound: given any DeMorgan circuit of size $3(n-1)$ that fails to compute $XOR_n$, we can efficiently produce a counterexample. While refuters follow from the gate elimination arguments themselves, this refinement requires a complete characterization of the set of optimal circuits computing $XOR$ -- a requirement rarely met by other explicit functions.

翻译：[摘要] 门消除是对一般布尔电路证明显式下界的主要技术，包括李和杨针对仿射分散器的最新成果$3.1n - o(n)$下界（STOC 2022）。每个电路下界本质上都是存在性的：任何过小以致无法计算函数$f$的电路必然在某个输入上出错。这自然引发了一个问题：这些下界是否具有\emph{构造性}？即，我们能否高效地生成这样的错误？Chen、Jin、Santhanam 和 Williams 指出，构造性在复杂性理论中许多长期悬而未决的问题中扮演核心角色，并明确提出了“哪些电路下界技术可以构造化”的问题（FOCS 2021）。我们证明，多种门消除论证可以导出“反驳器”——即给定一个过小以致无法计算函数$f$的电路时，能够产生该电路错误输入的高效算法。我们的结果涵盖从针对$XOR$和多路选择器的基础下界，到针对仿射分散器的更复杂论证。这些结果背后是视角的转变：门消除论证\emph{本质上是算法}。每一步要么简化电路，要么揭示某种结构或功能性质的违反，而借助少量额外工作，即可从中提取显式反例。我们进一步强化了$XOR$的结果，使其能够处理\emph{达到}下界的电路：给定任意一个大小为$3(n-1)$却未能计算$XOR_n$的德摩根电路，我们可高效生成反例。虽然反驳器可从门消除论证本身导出，但这一改进需要对计算$XOR$的最优电路集合作完整刻画——其他显式函数鲜有满足这一要求。