This paper introduces a checksum algorithm that provides a new point in the performance/complexity/effectiveness checksum tradeoff space. It has better fault detection properties than single-sum and dual-sum modular addition checksums. It is also simpler to compute efficiently than a cyclic redundancy check (CRC) due to exploiting commonly available hardware and programming language support for unsigned integer division. The key idea is to compute a single running sum, but introduce a left shift by the size (in bits) of the modulus before performing the modular reduction after each addition step. This approach provides a Hamming Distance of 3 for longer data word lengths than dual-sum approaches such as the Fletcher checksum. Moreover, it provides this capability using a single running sum that is only twice the size of the final computed check value, while providing fault detection capabilities even better than large-block variants of dual-sum approaches that require larger division operations. A variant that includes a parity bit achieves Hamming Distance 4 for about half the data word length as the baseline version for the same size check value.

翻译：本文提出了一种校验和算法，在性能/复杂度/有效性权衡空间中提供了新的平衡点。相较于单和与双和模加校验和，该算法具有更优的错误检测能力。通过利用常用硬件及编程语言对无符号整数除法的原生支持，其计算效率优于循环冗余校验（CRC）。核心思想是计算单个累加和，但每次加法步骤后在执行模约简前引入模数位宽（以比特计）的左移位操作。该方法在支持数据字长方面，其汉明距离可达3，性能优于Fletcher校验和等双和方案。且仅需使用最终校验值两倍大小的单累加和即可实现该能力，同时错误检测性能甚至优于需要更大除法运算的双和方案大块变体。包含奇偶校验位的变体可实现汉明距离4，在相同校验值大小下其数据字长约为基准版本的一半。