This paper reports three computational experiments for a von Neumann inspired reconfigurable fault tolerant multiprocessor for neural network (NN) training workflows. The experiments are intended to prove the feasibility of the proposed reconfigurable multiprocessor architecture for non-regular workflows on robustness of adaptability. A potential integration with MLIR compilers is also discussed for integrating diverse accelerator hardware for existing practical applications.

翻译：本文报告了针对一种受冯·诺依曼架构启发的可重构容错多处理器在神经网络训练工作流中的三项计算实验。这些实验旨在验证所提出的可重构多处理器架构在非规则工作流中适应性的鲁棒性方面的可行性。文中还探讨了与MLIR编译器进行潜在集成的可能性，以便为现有实际应用整合多样化的加速器硬件。