For potential quantum advantage, Variational Quantum Algorithms (VQAs) need high accuracy beyond the capability of today's NISQ devices, and thus will benefit from error mitigation. In this work we are interested in mitigating measurement errors which occur during qubit measurements after circuit execution and tend to be the most error-prone operations, especially detrimental to VQAs. Prior work, JigSaw, has shown that measuring only small subsets of circuit qubits at a time and collecting results across all such subset circuits can reduce measurement errors. Then, running the entire (global) original circuit and extracting the qubit-qubit measurement correlations can be used in conjunction with the subsets to construct a high-fidelity output distribution of the original circuit. Unfortunately, the execution cost of JigSaw scales polynomially in the number of qubits in the circuit, and when compounded by the number of circuits and iterations in VQAs, the resulting execution cost quickly turns insurmountable. To combat this, we propose VarSaw, which improves JigSaw in an application-tailored manner, by identifying considerable redundancy in the JigSaw approach for VQAs: spatial redundancy across subsets from different VQA circuits and temporal redundancy across globals from different VQA iterations. VarSaw then eliminates these forms of redundancy by commuting the subset circuits and selectively executing the global circuits, reducing computational cost (in terms of the number of circuits executed) over naive JigSaw for VQA by 25x on average and up to 1000x, for the same VQA accuracy. Further, it can recover, on average, 45% of the infidelity from measurement errors in the noisy VQA baseline. Finally, it improves fidelity by 55%, on average, over JigSaw for a fixed computational budget. VarSaw can be accessed here: https://github.com/siddharthdangwal/VarSaw.

翻译：为争取量子优势，变分量子算法（VQA）需要超越当前NISQ设备能力的精度，因此将受益于误差缓解技术。本文关注的是电路执行后量子比特测量过程中产生的测量误差——这些操作通常是最易出错的环节，尤其对VQA有负面影响。先前工作JigSaw表明，每次仅测量电路中的小量子比特子集，并汇集所有子集电路的测量结果，可减少测量误差。随后，通过运行完整（全局）原始电路并提取量子比特间的测量相关性，可与子集结果结合，构建原始电路的高保真输出分布。然而，JigSaw的执行成本随电路量子比特数呈多项式增长，当与VQA中多电路及多次迭代的复合成本叠加时，执行成本将迅速变得难以承受。为此，我们提出VarSaw，以应用定制化方式改进JigSaw，通过识别VQA场景下JigSaw方法中的显著冗余：不同VQA电路子集间的空间冗余，以及不同VQA迭代全局电路间的时间冗余。VarSaw通过交换子集电路顺序并选择性执行全局电路来消除这些冗余，在同等VQA精度下，相较于朴素JigSaw方法可将计算成本（以执行电路数量计）平均降低25倍，最高达1000倍。此外，该方法平均可从含噪VQA基线的测量误差中恢复45%的不保真度。最后，在固定计算预算下，较JigSaw平均提升55%的保真度。VarSaw代码可访问：https://github.com/siddharthdangwal/VarSaw。