While the challenges and solutions for efficient execution of scalable vector ISAs on long-vector-length microarchitectures have been well established, not all of these solutions are suitable for short-vector-length implementations. This work proposes a novel microarchitecture for instruction sequencing in vector units with short architectural vector lengths. The proposed microarchitecture supports fine-granularity chaining, multi-issue out-of-order execution, zero dead-time, and run-ahead memory accesses with low area or complexity costs. We present the Saturn Vector Unit, a RTL implementation of a RVV vector unit. With our instruction scheduling mechanism, Saturn exhibits comparable or superior power, performance, and area characteristics compared to state-of-the-art long-vector and short-vector implementations.

翻译：尽管在长向量长度微架构上高效执行可扩展向量指令集架构（ISA）所面临的挑战与解决方案已得到充分确立，但并非所有这些解决方案都适用于短向量长度实现。本文提出了一种适用于短架构向量长度向量单元指令排序的新型微架构。所提出的微架构支持细粒度链接、多发射乱序执行、零空闲时间以及低面积或复杂度开销的提前内存访问。我们介绍了土星向量单元，一种RVV向量单元的RTL实现。凭借我们的指令调度机制，与最先进的长向量和短向量实现相比，土星在功耗、性能和面积特性上展现出相当或更优的表现。