Dynamic programming (DP) based algorithms are essential yet compute-intensive parts of numerous bioinformatics pipelines, which typically involve populating a 2-D scoring matrix based on a recursive formula, optionally followed by a traceback step to get the optimal alignment path. DP algorithms are used in a wide spectrum of bioinformatics tasks, including read assembly, homology search, gene annotation, basecalling, and phylogenetic inference. So far, specialized hardware like ASICs and FPGAs have provided massive speedup for these algorithms. However, these solutions usually represent a single design point in the DP algorithmic space and typically require months of manual effort to implement using low-level hardware description languages (HDLs). This paper introduces DP-HLS, a novel framework based on High-Level Synthesis (HLS) that simplifies and accelerates the development of a broad set of bioinformatically relevant DP algorithms in hardware. DP-HLS features an easy-to-use template with integrated HLS directives, enabling efficient hardware solutions without requiring hardware design knowledge. In our experience, DP-HLS significantly reduced the development time of new kernels (months to days) and produced designs with comparable resource utilization to open-source hand-coded HDL-based implementations and performance within 7.7-16.8% margin. DP-HLS is compatible with AWS EC2 F1 FPGA instances. To demonstrate the versatility of the DP-HLS framework, we implemented 15 diverse DP kernels, achieving 1.3-32x improved throughput over state-of-the-art GPU and CPU baselines and providing the first open-source FPGA implementation for several of them. The DP-HLS codebase is available freely under the MIT license and its detailed wiki is available to assist new users.

翻译：基于动态规划（DP）的算法是众多生物信息学流程中至关重要但计算密集的部分，这些算法通常涉及基于递归公式填充二维评分矩阵，并可选择性地通过回溯步骤获取最优比对路径。DP算法广泛应用于生物信息学任务中，包括序列组装、同源性搜索、基因注释、碱基识别和系统发育推断等。迄今为止，专用硬件（如ASIC和FPGA）已为这些算法提供了显著的加速效果。然而，这些解决方案通常仅代表DP算法空间中的单一设计点，且通常需要数月时间使用底层硬件描述语言（HDL）进行手动实现。本文介绍了DP-HLS，一种基于高层次综合（HLS）的新型框架，旨在简化和加速硬件中广泛生物信息学相关DP算法的开发。DP-HLS采用易于使用的模板并集成HLS指令，使得无需硬件设计知识即可实现高效的硬件解决方案。根据我们的经验，DP-HLS显著缩短了新内核的开发时间（从数月减少至数日），并生成与开源手动编码HDL实现相比资源利用率相当、性能差距在7.7%-16.8%以内的设计。DP-HLS兼容AWS EC2 F1 FPGA实例。为展示DP-HLS框架的通用性，我们实现了15种不同的DP内核，相较于最先进的GPU和CPU基线实现了1.3-32倍的吞吐量提升，并为其中多个算法提供了首个开源FPGA实现。DP-HLS代码库基于MIT许可证免费开放，其详细维基文档可为新用户提供协助。