In this work, we present EMSpice 3, a full-chip temperature-aware multiphysics framework for coupled electromigration (EM), thermomigration (TM), and IR-drop analysis of power-grid networks. It unifies extracted netlists, configurable parameters, and optional chip-level thermal maps into a single flow supporting temperature-aware immortality screening, transient EM/TM stress simulation with iterative resistance updates, and optional Monte Carlo lifetime analysis. To accelerate large-tree simulations, EMSpice 3 integrates an extended rational Krylov reduction method into the transient solver without loss of accuracy. It also interfaces with Synopsys ICC and Fusion Compiler for practical deployment. By incorporating realistic spatial thermal maps into the reliability loop, the framework enables map-aware EM sign-off beyond average-temperature assumptions. Experiments on six designs show that spatial thermal variation significantly impacts EM reliability even with identical average temperature. For a RISC-V core, equal-average thermal profiles yield over 70% spread in time to failure (TTF), while an ARM Cortex-A core shows nearly 50%. The Krylov-accelerated solver achieves 1.18x - 1.50x runtime reduction. Monte Carlo analysis reveals strong design dependence: under 20% variation in diffusivity and critical stress, TTF variation is about 25\% for RISC-V but only 0.03% for ARM. These results demonstrate that EMSpice 3 enables practical, map-aware, and workload-aware full-chip EM reliability assessment.

翻译：本文提出EMSpice 3，一个面向电力网络的全芯片温度感知多物理场框架，用于耦合电迁移（EM）、热迁移（TM）及IR压降分析。该框架将提取网表、可配置参数与可选芯片级热分布图统一为单一流程，支持温度感知的无限寿命筛选、迭代电阻更新的瞬态EM/TM应力仿真以及可选蒙特卡洛寿命分析。为加速大规模树状结构仿真，EMSpice 3在瞬态求解器中集成了扩展有理Krylov降阶方法，且不损失精度。该框架还支持与Synopsys ICC及Fusion Compiler的接口以实现实际部署。通过将实际空间热分布图纳入可靠性分析循环，该框架能够超越平均温度假设，实现基于热分布图的EM签核验证。对六种设计的实验表明，即使平均温度相同，空间热分布差异也会显著影响EM可靠性。以RISC-V内核为例，等平均热分布下的失效时间（TTF）差异高达70%，而ARM Cortex-A内核的差异接近50%。Krylov加速求解器实现了1.18至1.50倍的运行时间缩减。蒙特卡洛分析揭示了强烈的设计依赖性：在扩散系数与临界应力变化20%的条件下，RISC-V的TTF变化约为25%，而ARM仅为0.03%。这些结果表明，EMSpice 3能够实现基于热分布图、工作负载感知的全芯片EM可靠性实际评估。