Probabilistic circuits (PCs) are a prominent representation of probability distributions with tractable inference. While parameter learning in PCs is rigorously studied, structure learning is often more based on heuristics than on principled objectives. In this paper, we develop Bayesian structure scores for deterministic PCs, i.e., the structure likelihood with parameters marginalized out, which are well known as rigorous objectives for structure learning in probabilistic graphical models. When used within a greedy cutset algorithm, our scores effectively protect against overfitting and yield a fast and almost hyper-parameter-free structure learner, distinguishing it from previous approaches. In experiments, we achieve good trade-offs between training time and model fit in terms of log-likelihood. Moreover, the principled nature of Bayesian scores unlocks PCs for accommodating frameworks such as structural expectation-maximization.

翻译：概率电路（PCs）是一种具有可处理推理能力的概率分布表示方法。虽然PCs的参数学习已得到严格研究，但结构学习往往更多基于启发式方法而非理论化目标。本文针对确定性PCs开发了贝叶斯结构评分（即边缘化参数后的结构似然），这是概率图模型中公认的结构学习严格目标。当该评分用于贪心割集算法时，能有效防止过拟合，并产生一个快速且几乎无需超参数调整的结构学习器，这与以往方法形成鲜明对比。在实验中，我们在训练时间与模型对数似然拟合度之间获得了良好权衡。此外，贝叶斯评分的理论化本质使得PCs能够适配结构期望最大化等框架。