Spiking neural networks (SNNs) have garnered interest due to their energy efficiency and superior effectiveness on neuromorphic chips compared with traditional artificial neural networks (ANNs). One of the mainstream approaches to implementing deep SNNs is the ANN-SNN conversion, which integrates the efficient training strategy of ANNs with the energy-saving potential and fast inference capability of SNNs. However, under extreme low-latency conditions, the existing conversion theory suggests that the problem of misrepresentation of residual membrane potentials in SNNs, i.e., the inability of IF neurons with a reset-by-subtraction mechanism to respond to residual membrane potentials beyond the range from resting potential to threshold, leads to a performance gap in the converted SNNs compared to the original ANNs. This severely limits the possibility of practical application of SNNs on delay-sensitive edge devices. Existing conversion methods addressing this problem usually involve modifying the state of the conversion spiking neurons. However, these methods do not consider their adaptability and compatibility with neuromorphic chips. We propose a new approach based on explicit modeling of residual errors as additive noise. The noise is incorporated into the activation function of the source ANN, which effectively reduces the residual error. Our experiments on the CIFAR10/100 dataset verify that our approach exceeds the prevailing ANN-SNN conversion methods and directly trained SNNs concerning accuracy and the required time steps. Overall, our method provides new ideas for improving SNN performance under ultra-low-latency conditions and is expected to promote practical neuromorphic hardware applications for further development.
翻译:脉冲神经网络(SNN)因其相较于传统人工神经网络(ANN)在神经形态芯片上的能效优势与卓越效能而备受关注。实现深度SNN的主流方法之一是ANN-SNN转换,该方法融合了ANN的高效训练策略与SNN的节能潜力及快速推理能力。然而,现有转换理论表明,在极端低延迟条件下,SNN中残差膜电位的表征错误问题(即采用减法重置机制的IF神经元无法响应超出静息电位至阈值范围的残差膜电位)会导致转换后的SNN性能与原始ANN存在差距,这严重限制了SNN在延迟敏感型边缘设备上的实际应用可能性。现有解决该问题的转换方法通常涉及修改转换脉冲神经元的状态,但未考虑这些方法对神经形态芯片的适应性与兼容性。我们提出了一种新方法:将残差误差显式建模为加性噪声,并将该噪声纳入源ANN的激活函数中,从而有效降低残差误差。在CIFAR10/100数据集上的实验验证表明,该方法在准确率和所需时间步长上均优于现有ANN-SNN转换方法及直接训练的SNN。总体而言,我们的方法为改进超低延迟条件下SNN性能提供了新思路,有望推动神经形态硬件实际应用的进一步发展。