Privacy and security have rapidly emerged as priorities in system design. One powerful solution for providing both is privacy-preserving computation, where functions are computed directly on encrypted data and control can be provided over how data is used. Garbled circuits (GCs) are a PPC technology that provide both confidential computing and control over how data is used. The challenge is that they incur significant performance overheads compared to plaintext. This paper proposes a novel garbled circuits accelerator and compiler, named HAAC, to mitigate performance overheads and make privacy-preserving computation more practical. HAAC is a hardware-software co-design. GCs are exemplars of co-design as programs are completely known at compile time, i.e., all dependence, memory accesses, and control flow are fixed. The design philosophy of HAAC is to keep hardware simple and efficient, maximizing area devoted to our proposed custom execution units and other circuits essential for high performance (e.g., on-chip storage). The compiler can leverage its program understanding to realize hardware's performance potential by generating effective instruction schedules, data layouts, and orchestrating off-chip events. In taking this approach we can achieve ASIC performance/efficiency without sacrificing generality. Insights of our approach include how co-design enables expressing arbitrary GCs programs as streams, which simplifies hardware and enables complete memory-compute decoupling, and the development of a scratchpad that captures data reuse by tracking program execution, eliminating the need for costly hardware managed caches and tagging logic. We evaluate HAAC with VIP-Bench and achieve an average speedup of 589$\times$ with DDR4 (2,627$\times$ with HBM2) in 4.3mm$^2$ of area.

翻译：摘要：隐私与安全已迅速成为系统设计的首要目标。隐私保护计算是同时实现这两者的强大解决方案，它允许在加密数据上直接执行函数，并能控制数据的使用方式。混淆电路（GC）是一种隐私保护计算技术，既能提供机密计算，又能控制数据使用方式。然而，其挑战在于相较于明文计算会引入显著的性能开销。本文提出一种名为HAAC的新型混淆电路加速器与编译器，旨在降低性能开销，使隐私保护计算更具实用性。HAAC是一种软硬件协同设计。由于程序在编译时完全可知（即所有依赖关系、内存访问及控制流均已固定），GC成为协同设计的典范。HAAC的设计理念是保持硬件简单高效，将最大面积用于所提出的自定义执行单元及其他对高性能至关重要的电路（如片上存储）。编译器可利用其程序理解能力，通过生成高效的指令调度、数据布局并协调片外事件，充分发挥硬件的性能潜力。采用此方法，我们可在不牺牲通用性的前提下实现专用集成电路（ASIC）级别的性能与能效。我们的方法创新点包括：利用协同设计将任意GC程序表达为数据流，从而简化硬件并实现内存与计算的完全解耦；以及开发一种通过追踪程序执行来捕获数据重用的暂存器，从而消除对高成本硬件管理缓存及标记逻辑的需求。我们使用VIP-Bench评估HAAC，在4.3mm²的面积下，采用DDR4实现了平均589倍的加速（采用HBM2则达2,627倍）。