With the increasing prevalence of chiplet systems in high-performance computing applications, the number of design options has increased dramatically. Instead of chips defaulting to a single die design, now there are options for 2.5D and 3D stacking along with a plethora of choices regarding configurations and processes. For chiplet-based designs, high-impact decisions such as those regarding the number of chiplets, the design partitions, the interconnect types, and other factors must be made early in the development process. In this work, we describe an open-source tool, CATCH, that can be used to guide these early design choices. We also present case studies showing some of the insights we can draw by using this tool. We look at case studies on optimal chip size, defect density, test cost, IO types, assembly processes, and substrates.

翻译：随着芯粒系统在高性能计算应用中的日益普及，设计选项的数量急剧增加。相较于传统单一芯片设计，现在出现了2.5D和3D堆叠方案，以及大量关于配置和工艺的选择。对于基于芯粒的设计，诸如芯粒数量、设计分区、互连类型等高影响决策必须在开发流程早期确定。本研究介绍了一款开源工具CATCH，该工具可用于指导这些早期设计选择。我们还通过案例研究展示了使用该工具所能获得的部分洞见，包括对最优芯片尺寸、缺陷密度、测试成本、输入输出类型、组装工艺及基板等方面的案例分析。