The design and optimization of hardware have traditionally been resource-intensive, demanding considerable expertise and dependence on established design automation tools. This paper discusses the possibility of exploiting large language models to streamline the code generation process in hardware design. In contrast to earlier studies, this paper aims to use large language models that accepts high-level design specifications through a single prompt to generate corresponding Register-Transfer Level (RTL) code. The ability to use large language models on RTL code generation not only expedites design iteration cycles but also facilitates the exploration of design spaces that have computational challenges for conventional techniques. Through our evaluation, we demonstrate the shortcoming of existing attention mechanisms, and present the abilities of language models to produce functional, optimized, and industry-standard compliant RTL code when a novel attention mechanism is used. These findings underscore the expanding role of large language models in shaping the future landscape of architectural exploration and automation in hardware design.

翻译：硬件设计与优化传统上需要大量资源投入，依赖专业知识和成熟的自动化设计工具。本文探讨利用大语言模型简化硬件设计中代码生成流程的可能性。与以往研究不同，本文旨在通过单一提示输入高层设计规范，使大语言模型直接生成对应的寄存器传输级（RTL）代码。将大语言模型应用于RTL代码生成不仅能够加速设计迭代周期，还能促进对传统技术难以计算的设计空间进行探索。通过评估，我们揭示了现有注意力机制的不足，并展示当采用新型注意力机制时，语言模型能够生成功能完备、优化且符合行业标准的RTL代码。这些发现凸显了大语言模型在塑造硬件设计领域未来架构探索与自动化进程中的关键作用。