Multi-core neuromorphic systems typically use on-chip routers to transmit spikes among cores. These routers require significant memory resources and consume a large part of the overall system's energy budget. A promising alternative approach to using standard CMOS and SRAM-based routers is to exploit the features of memristive crossbar arrays and use them as programmable switch-matrices that route spikes. However, the scaling of these crossbar arrays presents physical challenges, such as "IR drop" on the metal lines due to the parasitic resistance, and leakage current accumulation on multiple active memristors in their "off" state. While reliability challenges of this type have been extensively studied in synchronous systems for compute-in-memory matrix-vector multiplication (MVM) accelerators and storage class memory, little effort has been devoted so far to characterizing the scaling limits of memristor-based crossbar routers. Here, we study the challenges of memristive crossbar arrays, when used as routing channels to transmit spikes in asynchronous Spiking Neural Network (SNN) hardware. We validate our analytical findings with experimental results obtained from a 4K-ReRAM chip which demonstrates its functionality as a routing crossbar. We determine the functionality bounds on the routing due to the IR drop and leak problem, based on theoretical modeling, circuit simulations for a 22nm FDSOI technology, and experimental measurements. This work highlights the limitations of this approach and provides useful guidelines for engineering the memristor device properties in memristive crossbar routers for multi-core asynchronous neuromorphic systems.

翻译：多核神经形态系统通常使用片上路由器在核之间传输脉冲。这些路由器需要大量内存资源，并消耗系统总能量预算的很大一部分。一种替代标准CMOS和基于SRAM路由器的有前景方法是利用忆阻交叉阵列的特性，将其用作可编程开关矩阵来路由脉冲。然而，这些交叉阵列的缩放带来了物理挑战，例如由寄生电阻引起的金属线上“IR压降”，以及多个处于“关断”状态的活跃忆阻器上的泄漏电流累积。尽管这类可靠性问题已在同步系统的存内计算矩阵向量乘法(MVM)加速器和存储级内存中得到广泛研究，但目前针对忆阻交叉路由器的缩放极限表征工作仍然很少。本文研究了忆阻交叉阵列在异步脉冲神经网络(SNN)硬件中用作路由通道传输脉冲时面临的挑战。我们通过4K-ReRAM芯片获得的实验结果验证了分析结论，证明了其作为路由交叉阵列的功能性。基于理论建模、22nm FDSOI技术的电路仿真和实验测量，我们确定了由IR压降和泄漏问题导致的路由功能边界。本工作强调了该方法的局限性，并为多核异步神经形态系统中忆阻交叉路由器的忆阻器器件特性工程提供了实用指导准则。