Despite their age, MIPS processors remain deeply embedded in routers, industrial controllers, and IoT systems, yet their security against modern side-channel attacks has received little attention. This paper exposes how Simultaneous Multithreading (SMT), a feature increasingly used to boost performance in these environments, creates powerful cross-core timing channels on MIPS-based platforms. We introduce MIPSBLEED, a systematic analysis and exploitation framework that uncovers leakage in three shared microarchitectural components: the L1 data cache, L1 instruction cache, and the execution engine. Through carefully crafted assembly-level probes and quantitative leakage assessment, we demonstrate practical, high-resolution timing attacks that operate without requiring privileged access. Our evaluation reveals significant information leakage across all three channels and culminates in a single trace key recovery attack on a real elliptic curve cryptographic toolkit. These results position MIPS as an overlooked yet critical target in the study of microarchitectural security and underscore the urgent need for lightweight isolation mechanisms in resource-constrained, SMT-enabled embedded systems.

翻译：尽管MIPS处理器年代久远，但它们仍深度嵌入在路由器、工业控制器和物联网系统中，然而这些处理器面对现代侧信道攻击的安全性却鲜受关注。本文揭示了同步多线程（SMT，一种在此类环境中日益广泛用于提升性能的特性）如何在基于MIPS的平台上创建强大的跨核时序信道。我们提出了MIPSBLEED，这是一个系统性分析与利用框架，它揭示了三个共享微体系结构组件中的泄露：L1数据缓存、L1指令缓存和执行引擎。通过精心设计的汇编级探测和定量泄露评估，我们展示了无需特权访问即可实施的高分辨率实用时序攻击。我们的评估表明，所有三个信道均存在显著的信息泄露，并最终在真实椭圆曲线密码工具包上实现了单迹密钥恢复攻击。这些结果将MIPS定位为微体系结构安全研究中一个被忽视的关键目标，并凸显了在资源受限、支持SMT的嵌入式系统中亟需轻量级隔离机制。